Implement Logical Expression MCQ Quiz in తెలుగు - Objective Question with Answer for Implement Logical Expression - ముఫ్త్ [PDF] డౌన్‌లోడ్ కరెన్

Decoder is a combinational circuit that has ‘n’ input lines and maximum of 2ⁿ output lines. Therefore, Decoder - n lines to 2ⁿ lines

The multiplexer is a combinational logic circuit designed to switch 1 of several (2ⁿ) input lines to a single common output line. Therefore, Multiplexer - 2ⁿ lines to 1 line

A de-multiplexer is a device that takes 1 input line and routes it to one of several (2ⁿ) digital output lines. Therefore, De multiplexer - 1 line to 2ⁿ lines

Output of MUX:

Y = A′B′C + A′BC′ + AB′C′ + ABC

Y = (A ⊕ B ⊕ C)

Y = ∑(1,2,4,7), difference equation of full subtractor.

Truth table:

The output equation of MUX = Y = S_difference = S_sum

Therefore, multiplexer circuit is equivalent to sum equation of full adder as well as difference equation of a full subtractor

NOTE:

Since it is official ISRO CS 2020 question marks has been given for option 1 and option 4. 

.Original 4 is this. "Difference equation of a full subtractor"  which is changed to get correct answer

Output of MUX 1 is select line of MUX 2

Output of MUX 1: B̅.C + B.C̅

Output of MUX 2 is f

\(\therefore {\rm{f}} = \overline {\left( {{\rm{\bar B}}.{\rm{C}} + {\rm{B}}.{\rm{\bar C}}} \right)} .{\rm{\;}}0 + \left( {{\rm{\bar B}}.{\rm{C}} + {\rm{B}}.{\rm{\bar C}}} \right).{\rm{A}}\)

\({\rm{f}} = {\rm{A}}.{\rm{\bar B}}.{\rm{C}} + {\rm{A}}.{\rm{B}}.{\rm{\bar C}}\)

Output of MUX 1 = \(P'Q + PR\)

Output of MUX 2 = \(Q'R + Q(P'Q + PR)\)= ​\(Q'R + P'Q + PQR \)

Note:

According to option answer should be: Q’R + P’Q + PQR

But we can further minimized it to:

Q’R + P’Q + PQR

=Q’R + Q (P’+ PR)

=Q’R + Q (P’+ R)

=Q’R + P’Q + QR 

On selecting S=1 

Output of 1st  MUX:  

S̅.A + S.B = 0.A + 1.B = B 

B is select line of 2nd MUX

output of 2nd MUX:

F(A,B)=  B̅.A + B.S 

F(A,B)=  B̅.A + B.1 

F(A,B)= (B+B̅). (A + B)         \\by distribution 

∴ F( A,B) = A+B

A(B + C) + AB + (A + B)C

= AB + AC + AB + AC + BC

Data:

M = 64, N = 4

Fomula:

L ≥ log_NM

L = The number of levels of connection required.

Calculation:

\(L \ge \frac{{{{\log }_a}M}}{{{{\log }_{\rm{a}}}N}}\)

\(L \ge \frac{{{{\log }_a}64}}{{{{\log }_{\rm{a}}}4}}\)

∴ L ≥ 3

L_min = 3

∴ the minumum level required for 4 x 1 MUX = 3

Total number of MUX 4 × 1 is

\(\frac{{64}}{{{4^1}}} + \frac{{64}}{{{4^2}}} + \frac{{64}}{{{4^3}}} = 16 + 4 + 1 = 21\)

f = S̅₁ S̅₀ I₀ + S̅₁ S₀ I₁ + S₁ S̅₀ I₂ + S₁ S₀ I₃

= x̅ y̅ (1) + x̅ y (0) + x y̅ (0) + xy (1)

Output of MUX 1 is select line of MUX 2

Output of MUX 1: B̅.C + B.C̅

Output of MUX 2 is f

\(\therefore {\rm{f}} = \overline {\left( {{\rm{\bar B}}.{\rm{C}} + {\rm{B}}.{\rm{\bar C}}} \right)} .{\rm{\;}}0 + \left( {{\rm{\bar B}}.{\rm{C}} + {\rm{B}}.{\rm{\bar C}}} \right).{\rm{A}}\)

\({\rm{f}} = {\rm{A}}.{\rm{\bar B}}.{\rm{C}} + {\rm{A}}.{\rm{B}}.{\rm{\bar C}}\)

Output of MUX:

Y = A′B′C + A′BC′ + AB′C′ + ABC

Y = (A ⊕ B ⊕ C)

Y = ∑(1,2,4,7), difference equation of full subtractor.

Truth table:

The output equation of MUX = Y = S_difference = S_sum

Therefore, multiplexer circuit is equivalent to sum equation of full adder as well as difference equation of a full subtractor

NOTE:

Since it is official ISRO CS 2020 question marks has been given for option 1 and option 4. 

.Original 4 is this. "Difference equation of a full subtractor"  which is changed to get correct answer