Memory Elements MCQ Quiz - Objective Question with Answer for Memory Elements - Download Free PDF
Last updated on Jun 26, 2025
Latest Memory Elements MCQ Objective Questions
Memory Elements Question 1:
The flip-flop behaves as a:
Answer (Detailed Solution Below)
Memory Elements Question 1 Detailed Solution
Explanation:
Flip-Flop Behavior:
Definition: A flip-flop is a basic digital memory circuit used to store a single binary value. It is a bistable multivibrator, meaning it has two stable states. Flip-flops are fundamental building blocks in digital electronics and are extensively used in sequential logic circuits, registers, counters, and memory devices. The type of flip-flop determines its behavior and how it handles the input signals to transition between states.
Correct Option Analysis:
The correct option is:
Option 4: T Flip-Flop
The T flip-flop, also known as the toggle flip-flop, is a type of flip-flop that toggles its output state whenever a triggering signal (clock pulse) is applied. The behavior of the T flip-flop can be described as follows:
- Operation: The T flip-flop has a single input labeled "T" (Toggle). If T = 1, the flip-flop toggles its current state (from 0 to 1 or 1 to 0) on the rising edge of the clock pulse. If T = 0, the state remains unchanged.
- Truth Table:
Clock T Q (Current State) Qnext (Next State) ↑ 0 0 0 ↑ 0 1 1 ↑ 1 0 1 ↑ 1 1 0 - Behavior: The T flip-flop is widely used in applications like counters and toggling circuits because of its ability to change states with each clock pulse when T = 1.
Applications:
- Used in binary counters to divide the clock frequency.
- Employed in toggle switches for state-changing operations.
- Utilized in frequency division circuits.
Additional Information
To further understand the analysis, let’s evaluate the other options:
Option 1: JK Flip-Flop
The JK flip-flop is a versatile flip-flop with two inputs, J and K. It behaves differently based on the combination of its inputs:
- J = 0, K = 0: No change in state.
- J = 0, K = 1: Reset the output to 0.
- J = 1, K = 0: Set the output to 1.
- J = 1, K = 1: Toggle the output state.
While the JK flip-flop can toggle like the T flip-flop, it requires both inputs to be active (J = 1, K = 1) for toggling. Therefore, it is not specifically defined as a T flip-flop.
Option 2: RS Flip-Flop
The RS (Reset-Set) flip-flop is one of the simplest types of flip-flops. It has two inputs, R and S:
- R = 0, S = 0: No change in state.
- R = 0, S = 1: Set the output to 1.
- R = 1, S = 0: Reset the output to 0.
- R = 1, S = 1: Undefined state (not allowed).
This flip-flop does not toggle its state based on a single input, making it different from the T flip-flop.
Option 3: D Flip-Flop
The D (Data) flip-flop is designed to store a single bit of data. It has one input, D:
- D = 0: The output is reset to 0 on the clock pulse.
- D = 1: The output is set to 1 on the clock pulse.
The D flip-flop simply transfers the input to the output on the clock edge, without any toggling behavior, unlike the T flip-flop.
Option 5: This option is irrelevant to the context provided.
Conclusion:
Among the given choices, the T flip-flop (Option 4) is the correct answer because it specifically toggles its output state on the clock pulse, matching the described behavior. Understanding the distinctions between different types of flip-flops is essential for selecting the appropriate type for specific applications in digital circuit design.
Memory Elements Question 2:
In an asynchronous counter, the clock input of each flip-flop except first flip-flop is connected to:
Answer (Detailed Solution Below)
Memory Elements Question 2 Detailed Solution
The correct answer is: 2) the output of the previous flip-flop
Explanation:
In an asynchronous counter (also called a ripple counter):
Only the first flip-flop receives the external clock signal.
Each subsequent flip-flop is triggered by the output (Q or Q̅) of the previous flip-flop, not by a common clock.
This causes a ripple effect, where changes propagate sequentially, leading to a slight delay between stages.
Additional Information
Asynchronous Counter
Asynchronous counters are those counters where the clock of the next stage is obtained from the output of the previous state.
Memory Elements Question 3:
A positive edge-triggered T Flip-Flop has T = 1. If the current output Q is 0, what will be the output Q after 3 clock pulses?
Answer (Detailed Solution Below)
Memory Elements Question 3 Detailed Solution
The correct answer is option 3) 1
Concept:
Let's analyze the given problem statement and options in detail:
Given:
- T = 1
- Current output Q = 0
Let's analyze the state of Q after each clock pulse:
- Initial state Q = 0
- After 1st clock pulse: Q will toggle from 0 to 1
- After 2nd clock pulse: Q will toggle from 1 to 0
- After 3rd clock pulse: Q will toggle from 0 to 1
Therefore, the output Q after 3 clock pulses will be 1.
Memory Elements Question 4:
A 100 kHz square waveform is applied to the clock input of the flip-flop shown below. The frequency of Q output will be -
Answer (Detailed Solution Below)
Memory Elements Question 4 Detailed Solution
Calculation:
We are given that a 100 kHz square waveform is applied to the clock input of the flip-flop.
For a flip-flop, the output frequency is typically half of the input clock frequency, because a flip-flop toggles its state on each clock pulse. This means that for every two input pulses, the output changes state once.
Therefore, if the input frequency is 100 kHz, the output frequency will be:
Output frequency = Input frequency / 2
Substituting the given input frequency:
Output frequency = 100 kHz / 2 = 50 kHz
Hence, the frequency of Q output will be 50 kHz.
Final Answer: The correct answer is option 3: 50 kHz.
Memory Elements Question 5:
In an asynchronous counter using D flip - flop, which of the following is true?
Answer (Detailed Solution Below)
Memory Elements Question 5 Detailed Solution
Concept:
- Asynchronous Counter: This type of counter doesn't have a central clock signal for all flip-flops.
- D Flip-Flops: These are used because their output (Q) directly represents the data to be stored when the clock pulse arrives.
- Clock from Previous Flip-Flop: The output (Q) of one flip-flop is connected to the clock input of the next flip-flop in the counter chain.
This creates a cascading effect where a change in the first flip-flop triggers a change in the subsequent flip-flops one by one.
Additional Information
- Independent Clock Signals: This wouldn't create a reliable counting sequence, as the independent clocks might not be perfectly synchronized.
- Alternate Flip-Flops with Same Clock: This configuration wouldn't create a proper counting sequence either.
- Same Clock to All: While technically possible, using a single clock for all flip-flops would defeat the purpose of an asynchronous counter.
It would be simpler to use a synchronous counter with a common clock for all flip-flops.
Top Memory Elements MCQ Objective Questions
The S-R latch is an example of:
Answer (Detailed Solution Below)
Memory Elements Question 6 Detailed Solution
Download Solution PDFExplanation:
Latches and Flip-Flop:
- Latches and flip-flops are the basic elements to store 1-bit of data. Hence they are also known as a one-bit memory element.
- Latches change the output continuously when there is a change in the input, i.e. they are level triggered.
- Flip-flop is a combination of latch and clock. It changes the output that is adjusted by the clock.
- The main difference between a latch and a flip-flop is that a flip-flop has a clock signal, whereas a latch does not.
- We can say that a flip-flop without a clock is a latch.
- Latches are asynchronous, which means that the output of a latch depends on its input.
- Basically, there are 4 types of latches: SR latch, JK latch, D latch, T latch.
How many input terminal is represented by T flip flop?
Answer (Detailed Solution Below)
Memory Elements Question 7 Detailed Solution
Download Solution PDFT flip flop
The "T Flip Flop" has only one input.
It has only two output states i.e. hold and toggle.
For T = 0, the output is Qn (Hold state)
For T = 1, the output is
The output equation of the T flip-flop is:
Qn+1 = T ⊗ Qn
T |
Qn+1 |
0 |
No change |
1 |
Toggle |
The number of flip-flops required for constructing a mod-12 counter is :
Answer (Detailed Solution Below)
Memory Elements Question 8 Detailed Solution
Download Solution PDFThe correct answer is option 2): 4
Concept:
For a counter with ‘n’ flip flops:
- The total number of states = 2n (0 to 2n – 1)
- The largest number that can be stored in the counter = 2n – 1
- To construct a counter with any MOD number, the minimum number of flip flops required must satisfy: Modulus ≤ 2n
- Where n is the number of flip-flops and is the minimum value satisfying the above condition.
- Note: A MOD-N counter is also called as a divide by N counter as the input frequency is divided by the number of states of the counter.
Calculation:
Number no. of flip – flops are required to construct mod-12 counter,
must satisfy: 2n ≥ 12 The minimum value of n satisfying the above is: n = 4
Three T flip flops are connected to form a counter. The maximum states possible for the counter will be:
Answer (Detailed Solution Below)
Memory Elements Question 9 Detailed Solution
Download Solution PDFConcept:
For a counter with ‘n’ flip flops:
- The total number of states = 2n (0 to 2n – 1)
- The largest number that can be stored in the counter = 2n – 1
To construct a counter with any MOD number, the minimum number flip flops required must satisfy:
Modulus ≤ 2n
Where n is the number of flip-flops and is the minimum value satisfying the above condition.
Calculation:
The total number of states required when n = 3:
23 ≥ 8
The states will vary from (0 to 7)
So the maximum states possible for the counter will be 8.
In a positive edge triggered JK flip-flop, J = 1, K = 0 and clock pulse is rising, Q will be
Answer (Detailed Solution Below)
Memory Elements Question 10 Detailed Solution
Download Solution PDFConcept:
Characteristic table of J-K flip-flop is,
J |
K |
Q(n + 1) |
0 |
0 |
Q(n) |
0 |
1 |
0 |
1 |
0 |
1 |
1 |
1 |
|
Here, Q(n) is the present state of flip flop and Q(n + 1) is the next state of flip flow.
+ve edge-triggered means the state of flip-flop will only change at the rising edge of the clock.
Therefore, from the characteristic table;
when J = 1, K = 0, Q(n) = 1
Therefore, the correct option will be (2).
In which of the following condition the SR flip flop are unstable?
Answer (Detailed Solution Below)
Memory Elements Question 11 Detailed Solution
Download Solution PDFAn un-clocked R-S flip flop using NOR gates is as shown:
The truth table for the circuit is shown:
Inputs (S R) |
Output (Qn+1) |
Action |
0 0 |
Q |
No change |
0 1 |
0 |
Reset |
1 0 |
1 |
Set |
1 1 |
0 |
Indeterminate (Undefined) |
In S-R latch (NOR), when the SET input is made high, output Q becomes:
Answer (Detailed Solution Below)
Memory Elements Question 12 Detailed Solution
Download Solution PDFAn unclocked R-S flip flop using NOR gates is as shown:
The truth table for the circuit is shown:
Inputs S R |
Output (Qn+1) |
Action |
0 0 |
Q |
No change |
0 1 |
0 |
Reset |
1 0 |
1 |
Set |
1 1 |
0 |
Race condition (Undefined) |
The difference between latches and flip flops is shown
Latches |
Flip Flops |
Latches are building block of sequential circuits and they are built using logic gates |
Flip flops are also building blocks of sequential circuits but they are made using latches |
Latches continuously changes input and output changes correspondingly |
Flip flop output changes only when clock is applied |
Latches are level sensitive |
Flip flops are edge sensitive |
Which property is NOT considered in latches?
Answer (Detailed Solution Below)
Memory Elements Question 13 Detailed Solution
Download Solution PDF- Latches are level-triggered (outputs can change as soon as the inputs changes)
- Flip-Flop is edge-triggered (only changes state when a control signal goes from high to low or low to high).
- Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal.
- Level triggering is a type of triggering that allows a circuit to become active when the clock pulse is on a particular level.
The number of flip-flops required in a decade counter are -
Answer (Detailed Solution Below)
Memory Elements Question 14 Detailed Solution
Download Solution PDFConcept:
For an ‘n’ flip flop counter,
- The total number of states = 2n (0 to 2n – 1)
- The largest number that can be stored in the counter = 2n – 1
To construct any mod counter, the minimum number flip flops required such that: Modulus ≤ 2n
Where n is the number of counters.
Calculation:
Number no. of flip – flops are required to construct a mod-10 counter (decade counter) is obtained as:
2n ≥ 10 i.e. n = 4
Note: A MOD-N counter is also called as a divide by N counter as the input frequency is divided by the number of states of the counter.
If the present state is 0 and the next state is 1, then:
Answer (Detailed Solution Below)
Memory Elements Question 15 Detailed Solution
Download Solution PDFTruth Table of JK flip flop
J |
K |
Qn+1 |
0 |
0 |
Qn |
0 |
1 |
0 |
1 |
0 |
1 |
1 |
1 |
|
When both inputs are low, the next state output will be the present state output.
For J=0 & K=1, the next state output will always be 0 irrespective of the present state.
For J=1 & K=0, the next state output will always be 1 irrespective of the present state.
When both inputs are high, the next state output will be the complement of the present state output.
Characteristics table of JK flip flop
J |
K |
Qn |
Qn+1 |
0 |
0 |
0 |
0 |
0 |
0 |
1 |
1 |
0 |
1 |
0 |
0 |
0 |
1 |
1 |
0 |
1 |
0 |
0 |
1 |
1 |
0 |
1 |
1 |
1 |
1 |
0 |
1 |
1 |
1 |
1 |
0 |
Excitation table of JK flip flop
Qn |
Qn+1 |
J |
K |
0 |
0 |
0 |
X |
0 |
1 |
1 |
X |
1 |
0 |
X |
1 |
1 |
1 |
X |
0 |
From the excitation table, it is observed that:
If the present state is 0 and the next state is 1, then J = 1 & k = don't care.