Machine Cycles and Clock Cycles MCQ Quiz in मराठी - Objective Question with Answer for Machine Cycles and Clock Cycles - मोफत PDF डाउनलोड करा
Last updated on Mar 15, 2025
Latest Machine Cycles and Clock Cycles MCQ Objective Questions
Top Machine Cycles and Clock Cycles MCQ Objective Questions
Machine Cycles and Clock Cycles Question 1:
Match the following:
| 1. | MOV A,B | a. | 4 Machine cycles |
| 2. | MOV A,M | b. | 3 Machine cycles |
| 3. | LDA 3000H | c. | 1 Machine cycles |
| 4. | LXI F0F1H | d. | 2 Machine cycles |
Answer (Detailed Solution Below)
Machine Cycles and Clock Cycles Question 1 Detailed Solution
Machine cycle:
- The time required by the microprocessor to complete an operation of accessing memory or input/output devices is called machine cycle.
- One time period of frequency of microprocessor is called machine cycle.
The instruction MOV A,B is a 1-byte instruction. Microprocessor takes only one machine cycle (
The instruction MOV A, M requires 1-Byte, 2-Machine Cycles (Opcode Fetch, Memory Read) and 7 T-States for execution.
The instruction LDA 3000H copies the contents of the memory location 3000H into the accumulator. it is a 3-byte instruction with four machine cycles and 13 T-states.
The instruction LXI F0F1H requires 3-Bytes, 3-Machine Cycles (Opcode Fetch, Memory Read, Memory Read) and 10 T-States for execution.
Solution is : 1 – c, 2 – d, 3 – a, 4 – b.
Machine Cycles and Clock Cycles Question 2:
The execution time of entire program in terms of T – state is
XRA A
MOV B, A
MVI C, 05H
LOOP: DCR C
JNZ LOOPAnswer (Detailed Solution Below)
Machine Cycles and Clock Cycles Question 2 Detailed Solution
XRA A 4T
MOV B, A 4T
MVI C, 05H 7T
LOOP: DCR C 4T
JNZ LOOP 10T/7T
∴ Loop will be repeated for five times. If condition satisfies then jump will take 10T states and it takes 7T states if condition is not satisfied
∴ Number of T – states = 4T + 4T + 7T + 5(4T) + 4(10T) + 7T
= 15T + 20T + 40T + 7T
= 82TMachine Cycles and Clock Cycles Question 3:
In 8085 microprocessor the control signal \(\rm {IO/\bar M\ }\)is set in high impedance state and the status signals signals are given as \(\rm{S_1=0\ and\ S_2\ =0}\). Then find the minimum number of clock cycles required for proper operation.
Answer (Detailed Solution Below)
5
Machine Cycles and Clock Cycles Question 3 Detailed Solution
From the given data the above microprocessor in present in HLT state .So number of clock cycles required for proper operation is 5.
Additional data:
For Opcode Fetch Operation : Minimum of 4 clock cycles and Maximum of 6 clock cycles.
Read/Write Operation : 3 clock cycles.
Interrupt Acknowledgement : 6 clock cycles.
HLT/HOLD : 5 clock cycles.
Machine Cycles and Clock Cycles Question 4:
An 8085 uses a 2 MHz crystal
Calling program DELAY PUSH PSW
MV1 A, 64 H
CALL DELAY LOOP NOP
DCR A
JNZ LOOP
POP PSW
RET
Given,
CALL instruction takes 18 cycles
PUSH instruction takes 12 cycles
Conditional JUMP instruction takes 10 cycles (If jump taken) & 7 cycles (if not taken)
All other instructions takes (3n + 1) cycles where
n = no. of access to the memory, inclusive of op code fetch.
Then Calculate the time taken to execute the following delay sub routine (given above) inclusive of CALL instruction.(in msec)
Answer (Detailed Solution Below) 1.25 - 1.258
Machine Cycles and Clock Cycles Question 4 Detailed Solution
|
Instruction |
No. of cycles |
Comments |
|
CALL |
18 |
|
|
RET |
18 |
|
|
PUSH |
12 |
|
|
POP |
12 |
|
|
JUMP (false) |
990 |
99 x 10 |
|
TRUE |
7 |
1 x 7 |
|
NOP |
100 |
100 x 1 |
|
DCR A |
100 |
100 x 1 |
|
MV1 A, 64H |
1 |
|
|
TOTAL: |
1258 CYCLES |
|
Clock frequency = 2 MHz
In 8085, clock is divided by 2 frequency
Internally 1 MHz
T cycle = 10-6s
Total time = 1258 x 10-6 = 1.258 ms
Machine Cycles and Clock Cycles Question 5:
Number if Machine cycles required to execute DCR M, XTHL and XCHG respectively
Answer (Detailed Solution Below)
3, 5, 1
Machine Cycles and Clock Cycles Question 5 Detailed Solution
DCR M → [Op code fetch + Decode] + [Read] + [write]
XTHL → [Op code fetch + Decode] + [Read] + [Read] + [Write] + [Write]
XCHG → [Op code fetch + Decode]
Machine Cycles and Clock Cycles Question 6:
Which of the following instructions does not have memory write cycle:
Answer (Detailed Solution Below)
POP PSW
Machine Cycles and Clock Cycles Question 6 Detailed Solution
XTHL: exchange the content of HL to the top of stack
Hence there is a write cycle
It has Fetch + Decoder + Read + Read + Write + Write Cycles
MOV M, A : Move the content of accumulator into memory pointer .
It has (Opcode + Fetch + Decode) + (read data from accumulator) + (write data into memory pointer)
INR M : increment the content present in memory pointer It has
(opcode fetch + Decode) + read data from memory pointer + write Data into memory pointer
POP PSW: (opcode fetch + Decode) + read + read
Machine Cycles and Clock Cycles Question 7:
Comprehension:
An 8085 uses a 2MHz crystal
Calling program DELAY PUSH PSW
MVI A, 64 h
CALL DELAY LOOP NOP
DCR A
JNZ LOOP
POP PSW
RET
Given,
CALL instruction takes 18 cycles
PUSH instruction takes 12 cycles
Conditional JUMP instruction takes 10 cycles (If jump taken) & 7 cycles (if not taken)
All other instructions takes (3n + 1) cycles where
n = no. of access to the memory, inclusive of opcode fetch.
Calculate the time taken to execute the following delay sub routine (given above) inclusive of CALL instruction.
Answer (Detailed Solution Below)
1.258 ms
Machine Cycles and Clock Cycles Question 7 Detailed Solution
Clock frequency = 2 MHz
In 8085, clock is divided by 2 frequency
Internally 1 MHz
T cycle = 10-6s
Total time = 1258 x 10-6 = 1.258 ms
Machine Cycles and Clock Cycles Question 8:
Comprehension:
An 8085 uses a 2MHz crystal
Calling program DELAY PUSH PSW
MVI A, 64 h
CALL DELAY LOOP NOP
DCR A
JNZ LOOP
POP PSW
RET
Given,
CALL instruction takes 18 cycles
PUSH instruction takes 12 cycles
Conditional JUMP instruction takes 10 cycles (If jump taken) & 7 cycles (if not taken)
All other instructions takes (3n + 1) cycles where
n = no. of access to the memory, inclusive of opcode fetch.
Calculate the total no. of cycles (inclusive CALL instruction).
Answer (Detailed Solution Below)
1258
Machine Cycles and Clock Cycles Question 8 Detailed Solution
|
Instruction |
No. of cycles |
Comments |
|
CALL |
18 |
|
|
RET |
18 |
|
|
PUSH |
12 |
|
|
POP |
12 |
|
|
JUMP (false) |
990 |
99 x 10 |
|
TRUE |
7 |
1 x 7 |
|
NOP |
100 |
100 x 1 |
|
DCRA |
100 |
100 x 1 |
|
MV1 A, 64H |
1 |
|
|
TOTAL: |
1258 CYCLES |
|