Implement Logical Expression MCQ Quiz in தமிழ் - Objective Question with Answer for Implement Logical Expression - இலவச PDF ஐப் பதிவிறக்கவும்

Last updated on Apr 4, 2025

பெறு Implement Logical Expression பதில்கள் மற்றும் விரிவான தீர்வுகளுடன் கூடிய பல தேர்வு கேள்விகள் (MCQ வினாடிவினா). இவற்றை இலவசமாகப் பதிவிறக்கவும் Implement Logical Expression MCQ வினாடி வினா Pdf மற்றும் வங்கி, SSC, ரயில்வே, UPSC, மாநில PSC போன்ற உங்களின் வரவிருக்கும் தேர்வுகளுக்குத் தயாராகுங்கள்.

Latest Implement Logical Expression MCQ Objective Questions

Top Implement Logical Expression MCQ Objective Questions

Implement Logical Expression Question 1:

Match the terms in List - I with the options given in List - II :

 

List - I

 

List – II

(a)

Decoder

(i)

1 line to 2n lines

(b)

Multiplexer

(ii)

n lines to 2n lines

(c)

De multiplexer

(iii)

2n lines to 1 line

 

 

(iv)

2n lines to 2n−1 lines

  1. (a) – (ii), (b) – (i), (c) – (iii)
  2. (a) – (ii), (b) – (iii), (c) – (i)
  3. (a) – (ii), (b) – (i), (c) – (iv)
  4. (a) – (iv), (b) – (ii), (c) – (i)

Answer (Detailed Solution Below)

Option 2 : (a) – (ii), (b) – (iii), (c) – (i)

Implement Logical Expression Question 1 Detailed Solution

Decoder is a combinational circuit that has ‘n’ input lines and maximum of 2n output lines. Therefore, Decoder - n lines to 2n lines

The multiplexer is a combinational logic circuit designed to switch 1 of several (2n) input lines to a single common output line. Therefore, Multiplexer - 2n lines to 1 line

A de-multiplexer is a device that takes 1 input line and routes it to one of several (2n) digital output lines. Therefore, De multiplexer - 1 line to 2n lines

Implement Logical Expression Question 2:

Following Multiplexer circuit is equivalent to

  1. Sum equation of full adder
  2. Carry equation of full adder
  3. Borrow equation for full subtractor
  4. None of these

Answer (Detailed Solution Below)

Option 1 : Sum equation of full adder

Implement Logical Expression Question 2 Detailed Solution

Output of MUX:

Y = A′B′C + A′BC′ + AB′C′ + ABC

Y = (A ⊕ B ⊕ C)

Y = ∑(1,2,4,7), difference equation of full subtractor.

Truth table:

A

B

C

Sdifference

Cborrow

Ssum

Ccarry

0

0

0

0

0

0

0

0

0

1

1

1

1

0

0

1

0

1

1

1

0

0

1

1

0

1

0

1

1

0

0

1

0

1

0

1

0

1

0

0

0

1

1

1

0

0

0

0

1

1

1

1

1

1

1

1

 

The output equation of MUX = Y = Sdifference = Ssum

Therefore, multiplexer circuit is equivalent to sum equation of full adder as well as difference equation of a full subtractor

NOTE:

Since it is official ISRO CS 2020 question marks has been given for option 1 and option 4. 

.Original 4 is this. "Difference equation of a full subtractor"  which is changed to get correct answer

Implement Logical Expression Question 3:

The Boolean function f implemented in the figure using two input multiplexes is:

  1. AB̅C + ABC̅

Answer (Detailed Solution Below)

Option 1 : AB̅C + ABC̅

Implement Logical Expression Question 3 Detailed Solution

Output of MUX 1 is select line of MUX 2

Output of MUX 1: B̅.C + B.C̅

Output of MUX 2 is f

Implement Logical Expression Question 4:

Which of the following sets of components is/are enough to implement any arbitrary Boolean functions?

I. 2 to 1 multiplexers

II. NAND gates

III. OR gate, NOT gate

IV. XOR gate, NOT gate

  1. Only I
  2. I and II
  3. I, II and III
  4. I, II, III and IV

Answer (Detailed Solution Below)

Option 3 : I, II and III

Implement Logical Expression Question 4 Detailed Solution

  • Functionally complete operations set is a set of logic function from which any arbitrary Boolean logic function can be realized.
  • Examples of functionally complete operation set are:
    1. OR gate, NOT gate 
    2. AND gate, NOT gate
    3.  NOR gate
    4. NAND gate
    5.  2:1 MUX
    • Any super set of the above examples will also form functionally complete operations set.

Implement Logical Expression Question 5:

Consider the two cascaded 2-to-1 multiplexers as shown in the figure:

The minimal sum of products form of the output X is

Answer (Detailed Solution Below)

Option 1 :

Implement Logical Expression Question 5 Detailed Solution

Output of MUX 1 = 

Output of MUX 2 = = ​

Note:

According to option answer should be: Q’R + P’Q + PQR

But we can further minimized it to:

Q’R + P’Q + PQR

=Q’R + Q (P’+ PR)

=Q’R + Q (P’+ R)

=Q’R + P’Q + QR 

Implement Logical Expression Question 6:

In a cascaded MUX, we set select line S to high. Then F (A, B) =

  1. A + B
  2. AB
  3. A ⊕ B

Answer (Detailed Solution Below)

Option 1 : A + B

Implement Logical Expression Question 6 Detailed Solution

On selecting S=1 

Output of 1st  MUX:  

S̅.A + S.B = 0.A + 1.B = B 

B is select line of 2nd MUX

output of 2nd MUX:

F(A,B)=  B̅.A + B.S 

F(A,B)=  B̅.A + B.1 

F(A,B)= (B+B̅). (A + B)         \\by distribution 

∴ F( A,B) = A+B

Implement Logical Expression Question 7:

The minimum Boolean expression for the following circuit is

  1. AB + AC + BC

  2. A + BC
  3. A + B
  4. A + B + C
  5. ABC

Answer (Detailed Solution Below)

Option 1 :

AB + AC + BC

Implement Logical Expression Question 7 Detailed Solution

A(B + C) + AB + (A + B)C

= AB + AC + AB + AC + BC

= AB + AC + BC

Implement Logical Expression Question 8:

Find the minimum number of MUX needed to implement 64 x 1 MUX using 4 x 1 MUX?

  1. 20
  2. 21
  3. 22
  4. 24
  5. 16

Answer (Detailed Solution Below)

Option 2 : 21

Implement Logical Expression Question 8 Detailed Solution

Data:

M = 64, N = 4

Fomula:

L ≥ logNM

L = The number of levels of connection required.

Calculation:

∴ L ≥ 3

Lmin = 3

∴ the minumum level required for 4 x 1 MUX = 3

Total number of MUX 4 × 1 is

Given MUX

To be implemented

Required

2 : 1

16 : 1

8 + 4 + 2 + 1 = 15

4 : 1

16 : 1

4 + 1 = 5

4 : 1

64 : 1

18 + 4 + 1 = 21

8 : 1

64 : 1

8 + 1 = 9

8 : 1

256 : 1

32 + 4 + 1 = 37

Implement Logical Expression Question 9:

The output f of the 4-to-1 MUX is shown in the figure. The function, f, is given as

  1. x̅ y̅ + xy
  2. x̅ y + x y̅
  3. x + y
  4. x̅ + y̅
  5. xy

Answer (Detailed Solution Below)

Option 1 : x̅ y̅ + xy

Implement Logical Expression Question 9 Detailed Solution

f = S̅10 I0 + S̅1 S0 I1 + S10 I2 + S1 S0 I3

= x̅ y̅ (1) + x̅ y (0) + x y̅ (0) + xy (1)

= x̅ y̅ + xy

Implement Logical Expression Question 10:

The Boolean function f implemented in the figure using two input multiplexes is:

  1. AB̅C + ABC̅
  2. ABC

Answer (Detailed Solution Below)

Option 1 : AB̅C + ABC̅

Implement Logical Expression Question 10 Detailed Solution

Output of MUX 1 is select line of MUX 2

Output of MUX 1: B̅.C + B.C̅

Output of MUX 2 is f

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