Question
Download Solution PDFArrange the following addresses in ascending order of their priority
A. Address for divide error is 0000H
B. Address for one - byte interrupt instruction, INT is 000CH
C. Address for overflow, INTO instruction is 0010H
D. Address for single step trap - TF must be set is 0004H
E. Address for non maskable interrupt is 0008H
Choose the correct answer from the options given below:
Answer (Detailed Solution Below)
Detailed Solution
Download Solution PDFInterrupt priority level: It is a part of the current system interrupt state, which indicates the interrupt request that will currently be accepted.
Markable interrupt: Those interrupt which can be disabled or ignored by the microprocessor are known as maskable interrupts.
Eg. INTR, RST 7.5, RST 6.5, RST 5.5
TRAP is a Non markable interrupt because it can not be ignored by the microprocessor.
Explanation:
Priority order for given interrupt is
0000H < 0004H < 0008H < 000CH < 0010H
i.e. A < D < E < B < C
option 1 correct.
Notes:
Interrupt priority in the 8085 Microprocessor are:
|
Interrupt |
Triggering |
Vectored address |
Maskable (m)/Nonmaskable |
|
TRAP (RST 4.5) |
Edge and level |
0024H |
NM |
|
RST 7.5 |
Edge |
003CH |
M |
|
RST 6.5 |
Level |
0034H |
M |
|
RST 5.5 |
Level |
002CH |
M |
|
IMTR |
level |
Non vectored |
|
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